The impurities,unlike a conventional p-n junction, which has a

The conditions for achieving electrostatic doping mainlyincludes lithography steps, preferring III-V semiconductors(small band gaps), wrap-gate architecture with ultrathin doxand nanowire with ultrathin dnw preferable. High dopingconcentration in source contact, low Efs and good screeningsimultaneously is necessary. However, more extensiveexperimental investigation is required to confirm whether EDcould replace conventional doping in mainstream Si-CMOStechnology.Fig. 7. Calculated induced carrier concentration (10) in ?n-type? and?p-type? gated Schottky regions of the CP diode structure.ED potentially offers ultrasharp junctions with awell-controlled carrier concentration profile and a reduceddefect density. Such features make ED an attractivealternative to conventional impurity doping for a broad rangeof electron devices. A typical feature of the lateral EDconfiguration is that the potential distribution is linear in theintrinsic gap region because of the absence of impurities,unlike a conventional p-n junction, which has a parabolicpotential profile in the depletion region. The built-in electricfield in an impurity doped p-n junction is formed by fixeddonor or acceptor ions near the junction to balance drift anddiffusion components at equilibrium. This built-in field alsoexists in the CP p-n diode but is primarily formed by theworkfunction difference at the edges of the gated regions.Furthermore, the band bending near the electrodes is attributedto the 2-D fringe field effect. The ED is also interesting forinnovative device concepts, such as EHB-TFETs and RFETs,which could not be realized using conventional doping. One ofthe major advantage of ED is no deactivation of dopants.Reconfigurable devices such as n-type, p-type and tunnelFETs are possible and no conventional doping ofsemiconductors required. Disentangle Fermi to screen energyin source contact from ability to screen is possible in ED. Ithas a quick access to device physics.V. CONCLUSIONIn this paper basic analysis to achieve high p an ntype behavior electrostatically is discussed along with itsapplication on graphene. From various reported results and thedeveloped analytical understanding, it can be concluded thatED techniques can be utilized to induce high chargeconcentrations in UTB active devices. In general, ED is moreeffective for narrow bandgap semiconductorsThe performanceof ED devices is also found competitive with that ofconventional counterparts especially for SB-MOSFETs,RFETs, and TFETs. However, many of these devicearchitectures, in particular TFETs, have only been studied viamodeling or computer simulations. Experimental realization ofsuch structures will assist in evaluating the true merit of thesedevice ideas for alternative material systems and innovativedevice concepts for future CMOS. The effective workfunctionvariation, presence of interface traps, processing with multiplemetals, and applicability to wide bandgap materials areidentified as the current major limitations to ED approaches.These need to be extensively addressed for developing futureCMOS technology.REFERENCES1) Prashant . amat, Dirk . Guldi, F. D?ouza “Fullerenes and Nanotubes: The Building Blocks of NextGeneration …”- 20032) IEEE TRANSACTIONS ON ?ELECTRON DEVICES,VOL. 64, NO. 8″, AUGUST 20173) P. Srinivasan , Z. Karim, Y. Obeng, S. De Gendt, D.Mishra ” Graphene, Ge/III-V, and Emerging Materials forPost-CMOS Applications 2, Vol no. 28 Issue 5″- 2010